Job Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical design.
Description
As a CPU Physical Design Engineer, you will drive or participate in the following:
• Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals
• Will be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield
• Will work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in CPU design
• Will work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability
• Will work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Minimum Qualifications
- Minimum BS and 3+ years of relevant industry experience
- Experience with digital circuits, timing/power concepts, and logic design
- Experience in Perl or TCL
Key Qualifications
Preferred Qualifications
- Experience in using industry standard logic Synthesis, PnR, STA and Power analysis tools along with floor-planning, pin-placement and timing budgeting
- Ability to work well in a team, self-motivated and excellent communication skills
Education & Experience
Additional Requirements
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
- Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
As a CPU Physical Design Engineer, you will drive or participate in the following:
• Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals
• Will be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield
• Will work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in CPU design
• Will work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability
• Will work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Job Tags
Relocation,