Job Description

Job Title: Physical Design Engineer Location: AZ; Phoenix Duration: 8+ Months Contract

: Electrical Engineering - Design Integrated Circuits (IC) that power everyday electronic devices. Design custom or semi-custom silicon used on electronic devices, cloud infrastructure, machine learning, and AI computational platforms. Work across the entire silicon design lifecycle, including system architecture, design verification, RTL digital design, physical design, design for test (DFT), and Emulation.

• What type of education is needed for this position? BS in Computer Science or Electrical Engineering
• Will this role work remote/In Office/Hybrid (in office & remote) Remote is a possibility.
• Will the client pay for travel and expenses? Yes, with prior approval
• Is industry experience needed for this role and why? Yes, 3-7 years' experience in semiconductor design and development.

“must-have” skills for this role1. Electrical Engineering2. Electronic Design Automation (EDA)3. Semiconductor Design & Development

Required Skills:

• Develop and own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, constraints, static timing analysis, formal verification, Gate level functional & timing ECO in advanced technology nodes
• Develop & document STA & Synthesis strategies. Interact with methodology teams to address challenges related to new technology nodes.
• Familiar with constraint checking tools and techniques to deliver quality constraints for both pre and post CTS views.
• Resolve design and flow issues related to physical design, identify potential solutions, and drive execution
• Proficiency in advanced synthesis & STA techniques to achieve aggressive low power, area, and timing goals. Must be able to drive solutions for complex timing closure scenarios.
• Ability to optimize designs for best in class in low power and high performance with logically equivalent RTL transforms
• Experience with multi-clock and multi-power domain designs.
• Proficiency with ECO for functional and DFT timing closure
• Deliver physical design of an end-to-end IP or integration of ASIC/SoC design

Minimum Qualifications:

• Bachelor's degree in electrical engineering or computer science
• 4-12 years' experience
• RTL2Gate experience on advanced technology nodes (7nm and below)
• Experience with low power implementation and signoff, power gating, multiple voltage rails, UPF knowledge.
• Experience in Block-level and Full-chip integration.
• Experience with Python, TCL, or Perl programming.
• Experience working with EDA tools like DC/Genus, ICC2/Innovus, Primetime

Preferred Qualifications:

• Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR on low power designs
• Knowledge of static timing analysis, defining timing constraints and exceptions, corners/voltage definitions
• Experience with Python, TCL or Perl programming

Additional Job Details:

1 - Electronic Design Automation (EDA) (P3 - Advanced)

2 - Semiconductor Design and Development (P3 - Advanced)

Job Type: Contract

Pay: Up to $65.00 per hour

Benefits:

• Employee discount
• Life insurance
• Referral program

Schedule:

• 8 hour shift

Willingness to travel:

• 25% (Preferred)

Work Location: On the road

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